Senior Design Engineer - Semiconductor IP Quality

Design Engineer II

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job Title: Design Engineer II

Company: Cadence

Location: Hyderabad

Job Type: Full-Time

Overview:

Cadence is seeking an experienced Foundation IP Quality Lead to drive the Product validation efforts for standard cells, IO libraries, and memory compilers across advanced nodes. This critical role ensures our IP products meet high standards in performance, manufacturability, and reliability.

Key Responsibilities:

Drive quality strategies and sign-off methodologies for Foundation IP.

Lead QA reviews, audits, and compliance for IP deliverables (Ex : Review of DRC/LVS, timing, reliability).

Analyze silicon and customer data to improve quality processes.

Collaborate with design, validation, and customer teams.

Mentor engineers and advocate for quality-first practices.

Qualifications:

B.S./M.S. in Electrical or Computer Engineering.

4+ years in semiconductor IP QA/design with strong foundation IP expertise.

Proficiency with EDA tools (Cadence, Synopsys, Mentor).

Knowledge of quality standards and silicon validation.

Preferred:

Background in advanced nodes, PDKs or memory validation.

Experience in EDA view generation and validation.

Why Cadence?

Join an award-winning, collaborative culture working on cutting-edge technologies powering AI, 5G, automotive, and cloud computing.

We’re doing work that matters. Help us solve what others can’t.

Experience Level

Mid Level