Silicon Physical Design Engineer

Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  
• 4 years of experience with physical design verification flows and methodology such as DRC, LVS, PERC, ESD signoff, ERC, antenna, DFM, or dummyfill checks, using industry standard signoff tools (e.g., Calibre).

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
  
• Experience with scripting languages such as Perl, Python, or Tcl.
  
• Experience with constraints, synthesis or clock tree synthesis (CTS).

About the job

The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

We're the driving team behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.

Responsibilities

• Define and drive to the implementation of physical design and physical verification (PV) methodologies.
• Take ownership of PV of one or more physical design partitions or top level.
• Drive to the closure of PV of the SoC design.
• Contribute to design methodology, libraries, and code review.
• Define the physical design rule sets for the physical design engineers.